Abstract
This paper demonstrates the use of new processor instructions VPMADD, intended to appear in the coming generation of Intel processors (codename 'Cannon Lake'), in order to accelerate the newly proposed key encapsulation mechanism (KEM) named SIKE. SIKE is one of the submissions to the NIST standardization process on post-quantum cryptography, and is based on pseudo-random walks in supersingular isogeny graphs. While very small keys are the main advantage of SIKE, its extreme computational intensiveness makes it one of the slowest KEM proposals. Performance optimizations are needed. We address here the 'Level 1' parameters that target 64-bit quantum security, and deemed sufficient for the NIST standardization effort. Thus, we focus on SIKE503 that operates over Fp2 with a 503-bit prime p. These short operands pose a significant challenge on using VPMADD effectively. We demonstrate several optimization methods to accelerate Fp, Fp2, and the elliptic curve arithmetic, and predict a potential speedup by a factor of 1.72x.
Original language | English |
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Title of host publication | Proceedings - 26th IEEE Symposium on Computer Arithmetic, ARITH 2019 |
Editors | Naofumi Takagi, Sylvie Boldo, Martin Langhammer |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 215-218 |
Number of pages | 4 |
ISBN (Electronic) | 9781728133669 |
DOIs | |
State | Published - Jun 2019 |
Externally published | Yes |
Event | 26th IEEE Symposium on Computer Arithmetic, ARITH 2019 - Kyoto, Japan Duration: 10 Jun 2019 → 12 Jun 2019 |
Publication series
Name | Proceedings - Symposium on Computer Arithmetic |
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Volume | 2019-June |
Conference
Conference | 26th IEEE Symposium on Computer Arithmetic, ARITH 2019 |
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Country/Territory | Japan |
City | Kyoto |
Period | 10/06/19 → 12/06/19 |
Bibliographical note
Publisher Copyright:© 2019 IEEE.
Keywords
- VPMADD processor instructions, software optimization, post quantum cryptography, supersingular isogeny
ASJC Scopus subject areas
- Software
- Theoretical Computer Science
- Hardware and Architecture