Using memory profile analysis for automatic synthesis of pointers code

Yosi Ben Asher, Nadav Rotem

Research output: Contribution to journalArticlepeer-review


One of the main advantages of high-level synthesis (HLS) is the ability to synthesize circuits that can access multiple memory banks in parallel. Current HLS systems synthesize parallel memory references based on explicit array declarations in the source code. We consider the need to synthesize not only array references but also memory operations targeting pointers and dynamic data structures. This paper describes Automatic Memory Partitioning, a method for automatically synthesizing general data structures (arrays and pointers) into multiple memory banks for increased parallelism and performance.We use source code instrumentation to collect memory traces in order to detect linear memory access patterns. The memory traces are used to split data structures into disjoint memory regions and determine which segments may benefit from parallel memory access. We present an algorithm for allocating memory segments into multiple memory banks. Experiments show significant improvements in performance while conserving the number of memory banks.

Original languageEnglish
Article number68
JournalTransactions on Embedded Computing Systems
Issue number3
StatePublished - Mar 2013


  • Memory analysis
  • Memory banks
  • Reconfigurable computing

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture


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