Speeding up SHA-1, SHA-256 and SHA-512 on the 2 nd generation Intel® Core™ processors

Shay Gueron

doi:10.1109/ITNG.2012.62

Speeding up SHA-1, SHA-256 and SHA-512 on the 2 ^nd generation Intel® Core™ processors

Shay Gueron

Department of Mathematics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper discusses some software techniques, targeted specifically to the 2 ^nd Generation Intel® Core™ processor, for speeding up the NIST standardized Secure Hash Algorithms SHA-1, SHA-256 and SHA-512. We demonstrate the advantage of our optimizations by applying them to a few publicly available code examples, obtaining SHA-1, SHA-256 and SHA-512 at, respectively, 5.75, 15.31, 9.71 cycles per byte.

Original language	English
Title of host publication	Proceedings of the 9th International Conference on Information Technology, ITNG 2012
Pages	824-826
Number of pages	3
DOIs	https://doi.org/10.1109/ITNG.2012.62
State	Published - 2012
Event	9th International Conference on Information Technology, ITNG 2012 - Las Vegas, NV, United States Duration: 16 Apr 2012 → 18 Apr 2012

Publication series

Name	Proceedings of the 9th International Conference on Information Technology, ITNG 2012

Conference

Conference	9th International Conference on Information Technology, ITNG 2012
Country/Territory	United States
City	Las Vegas, NV
Period	16/04/12 → 18/04/12

Keywords

efficient software implementation
secure hash algorithms

ASJC Scopus subject areas

Computer Networks and Communications

Access to Document

10.1109/ITNG.2012.62

Cite this

@inproceedings{e133a3be57154bb4853d101a6b81e394,

title = "Speeding up SHA-1, SHA-256 and SHA-512 on the 2 nd generation Intel{\textregistered} Core{\texttrademark} processors",

abstract = "This paper discusses some software techniques, targeted specifically to the 2 nd Generation Intel{\textregistered} Core{\texttrademark} processor, for speeding up the NIST standardized Secure Hash Algorithms SHA-1, SHA-256 and SHA-512. We demonstrate the advantage of our optimizations by applying them to a few publicly available code examples, obtaining SHA-1, SHA-256 and SHA-512 at, respectively, 5.75, 15.31, 9.71 cycles per byte.",

keywords = "efficient software implementation, secure hash algorithms",

author = "Shay Gueron",

year = "2012",

doi = "10.1109/ITNG.2012.62",

language = "English",

isbn = "9780769546544",

series = "Proceedings of the 9th International Conference on Information Technology, ITNG 2012",

pages = "824--826",

booktitle = "Proceedings of the 9th International Conference on Information Technology, ITNG 2012",

note = "9th International Conference on Information Technology, ITNG 2012 ; Conference date: 16-04-2012 Through 18-04-2012",

}

Gueron, S 2012, Speeding up SHA-1, SHA-256 and SHA-512 on the 2 ^nd generation Intel® Core™ processors. in Proceedings of the 9th International Conference on Information Technology, ITNG 2012., 6209073, Proceedings of the 9th International Conference on Information Technology, ITNG 2012, pp. 824-826, 9th International Conference on Information Technology, ITNG 2012, Las Vegas, NV, United States, 16/04/12. https://doi.org/10.1109/ITNG.2012.62

Speeding up SHA-1, SHA-256 and SHA-512 on the 2 ^nd generation Intel® Core™ processors. / Gueron, Shay.
Proceedings of the 9th International Conference on Information Technology, ITNG 2012. 2012. p. 824-826 6209073 (Proceedings of the 9th International Conference on Information Technology, ITNG 2012).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Speeding up SHA-1, SHA-256 and SHA-512 on the 2 nd generation Intel® Core™ processors

AU - Gueron, Shay

PY - 2012

Y1 - 2012

N2 - This paper discusses some software techniques, targeted specifically to the 2 nd Generation Intel® Core™ processor, for speeding up the NIST standardized Secure Hash Algorithms SHA-1, SHA-256 and SHA-512. We demonstrate the advantage of our optimizations by applying them to a few publicly available code examples, obtaining SHA-1, SHA-256 and SHA-512 at, respectively, 5.75, 15.31, 9.71 cycles per byte.

AB - This paper discusses some software techniques, targeted specifically to the 2 nd Generation Intel® Core™ processor, for speeding up the NIST standardized Secure Hash Algorithms SHA-1, SHA-256 and SHA-512. We demonstrate the advantage of our optimizations by applying them to a few publicly available code examples, obtaining SHA-1, SHA-256 and SHA-512 at, respectively, 5.75, 15.31, 9.71 cycles per byte.

KW - efficient software implementation

KW - secure hash algorithms

UR - http://www.scopus.com/inward/record.url?scp=84863968497&partnerID=8YFLogxK

U2 - 10.1109/ITNG.2012.62

DO - 10.1109/ITNG.2012.62

M3 - Conference contribution

AN - SCOPUS:84863968497

SN - 9780769546544

T3 - Proceedings of the 9th International Conference on Information Technology, ITNG 2012

SP - 824

EP - 826

BT - Proceedings of the 9th International Conference on Information Technology, ITNG 2012

T2 - 9th International Conference on Information Technology, ITNG 2012

Y2 - 16 April 2012 through 18 April 2012

ER -