Speed records for multi-prime RSA using AVX2 architectures

Shay Gueron; Vlad Krasnov

doi:10.1007/978-3-319-32467-8_22

Speed records for multi-prime RSA using AVX2 architectures

Shay Gueron, Vlad Krasnov

Department of Mathematics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

RSA is a popular public key algorithm. Its private key operation is modular exponentiation with a composite 2k-bit modulus that is the product of two kbit primes. Computing 2k-bit modular exponentiation can be sped up four fold with the Chinese Remainder Theorem (CRT), requiring two k-bit modular exponentiations (plus recombination). Multi-prime RSA is the generalization to the case where the modulus is a product of r ≥ 3 primes of (roughly) equal bit-length, 2k/r. Here, CRT trades 2k-bit modular exponentiation with r modular exponentiations, with 2k/r-bit moduli (plus recombination). This paper discusses multi-prime RSA with key lengths (=2k) of 2048/3072/4096 bits, and r = 3 or r = 4 primes. With these parameters, the security of multi-prime RSA is comparable to that of classical RSA. We show how to optimize multi-prime RSA on modern processors, by parallelizing r modular exponentiations and leveraging “vector” instructions, achieving performance gains of up to 5.07x.

Original language	English
Title of host publication	Information Technology
Subtitle of host publication	New Generations - 13th International Conference on Information Technology
Editors	Shahram Latifi
Publisher	Springer Verlag
Pages	237-245
Number of pages	9
ISBN (Print)	9783319324661
DOIs	https://doi.org/10.1007/978-3-319-32467-8_22
State	Published - 2016
Event	13th International Conference on Information Technology- New Generations, ITNG 2016 - Las Vegas, United States Duration: 4 Apr 2016 → 6 Apr 2016

Publication series

Name	Advances in Intelligent Systems and Computing
Volume	448
ISSN (Print)	2194-5357

Conference

Conference	13th International Conference on Information Technology- New Generations, ITNG 2016
Country/Territory	United States
City	Las Vegas
Period	4/04/16 → 6/04/16

Bibliographical note

Publisher Copyright:
© Springer International Publishing Switzerland 2016.

Keywords

AVX2
AVX512
Haswell broadwell skylake
Multi-prime RSA
RSA

ASJC Scopus subject areas

Control and Systems Engineering
General Computer Science

Access to Document

10.1007/978-3-319-32467-8_22

Cite this

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title = "Speed records for multi-prime RSA using AVX2 architectures",

abstract = "RSA is a popular public key algorithm. Its private key operation is modular exponentiation with a composite 2k-bit modulus that is the product of two kbit primes. Computing 2k-bit modular exponentiation can be sped up four fold with the Chinese Remainder Theorem (CRT), requiring two k-bit modular exponentiations (plus recombination). Multi-prime RSA is the generalization to the case where the modulus is a product of r ≥ 3 primes of (roughly) equal bit-length, 2k/r. Here, CRT trades 2k-bit modular exponentiation with r modular exponentiations, with 2k/r-bit moduli (plus recombination). This paper discusses multi-prime RSA with key lengths (=2k) of 2048/3072/4096 bits, and r = 3 or r = 4 primes. With these parameters, the security of multi-prime RSA is comparable to that of classical RSA. We show how to optimize multi-prime RSA on modern processors, by parallelizing r modular exponentiations and leveraging “vector” instructions, achieving performance gains of up to 5.07x.",

keywords = "AVX2, AVX512, Haswell broadwell skylake, Multi-prime RSA, RSA",

author = "Shay Gueron and Vlad Krasnov",

note = "Publisher Copyright: {\textcopyright} Springer International Publishing Switzerland 2016.; 13th International Conference on Information Technology- New Generations, ITNG 2016 ; Conference date: 04-04-2016 Through 06-04-2016",

year = "2016",

doi = "10.1007/978-3-319-32467-8\_22",

language = "English",

isbn = "9783319324661",

series = "Advances in Intelligent Systems and Computing",

publisher = "Springer Verlag",

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Gueron, S & Krasnov, V 2016, Speed records for multi-prime RSA using AVX2 architectures. in S Latifi (ed.), Information Technology: New Generations - 13th International Conference on Information Technology. Advances in Intelligent Systems and Computing, vol. 448, Springer Verlag, pp. 237-245, 13th International Conference on Information Technology- New Generations, ITNG 2016, Las Vegas, United States, 4/04/16. https://doi.org/10.1007/978-3-319-32467-8_22

Speed records for multi-prime RSA using AVX2 architectures. / Gueron, Shay; Krasnov, Vlad.
Information Technology: New Generations - 13th International Conference on Information Technology. ed. / Shahram Latifi. Springer Verlag, 2016. p. 237-245 (Advances in Intelligent Systems and Computing; Vol. 448).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - RSA is a popular public key algorithm. Its private key operation is modular exponentiation with a composite 2k-bit modulus that is the product of two kbit primes. Computing 2k-bit modular exponentiation can be sped up four fold with the Chinese Remainder Theorem (CRT), requiring two k-bit modular exponentiations (plus recombination). Multi-prime RSA is the generalization to the case where the modulus is a product of r ≥ 3 primes of (roughly) equal bit-length, 2k/r. Here, CRT trades 2k-bit modular exponentiation with r modular exponentiations, with 2k/r-bit moduli (plus recombination). This paper discusses multi-prime RSA with key lengths (=2k) of 2048/3072/4096 bits, and r = 3 or r = 4 primes. With these parameters, the security of multi-prime RSA is comparable to that of classical RSA. We show how to optimize multi-prime RSA on modern processors, by parallelizing r modular exponentiations and leveraging “vector” instructions, achieving performance gains of up to 5.07x.

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ER -

Speed records for multi-prime RSA using AVX2 architectures

Abstract

Publication series

Conference

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

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