Single step undirected reconfigurable networks

Yosi Ben-Asher, Assaf Schuster

Research output: Contribution to conferencePaperpeer-review


The reconfigurable mesh (RN-MESH) can solve a large class of problems in constant time, including problems that require logarithmic time by other, even shared memory, models such as the PRAM with a similar number of processors. In this work we show that for the RN-MESH these constants can always be reduced to one, still using a polynomial number of processors. Given a reconfigurable mesh that computes a set of values in constant time, we show that it can be simulated by a single step reconfigurable mesh with maximum size that is polynomial in the size of the original mesh. The proof is constructive, where the construction of the single step RN-MESH holds for the relatively weak undirected RN-MESH model. In this model broadcasts made on buses arrive at all nodes that belong to the undirected connected component of the transmitting processor. A result similar to the one that is obtained in this work was previously obtained for the directed reconfigurable mesh model (DRN). However, the construction for the DRN-MESH relies on the fact that the buses are directed, and thus cannot be applied to the undirected case. In addition, the construction presented here is simpler and uses significantly fewer processors than the one obtained for the DRN-MESH.

Original languageEnglish
Number of pages6
StatePublished - 1997
EventProceedings of the 1997 4th International Conference on High Performance Computing, HiPC - Bangalore, India
Duration: 18 Dec 199721 Dec 1997


ConferenceProceedings of the 1997 4th International Conference on High Performance Computing, HiPC
CityBangalore, India

ASJC Scopus subject areas

  • General Computer Science


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