Proving hard-core predicates using list decoding

Adi Akavia, Shafi Goldwasser, Samuel Safra

Research output: Contribution to journalConference articlepeer-review


We introduce a unifying framework for proving that predicate P is hard-core for a one-way function f, and apply it to a broad family of functions and predicates, reproving old results in an entirely different way as well as showing new hard-core predicates for well known one-way function candidates. Our framework extends the list-decoding method of Goldreich and Levin for showing hard-core predicates. Namely, a predicate will correspond to some error correcting code, predicting a predicate will correspond to access to a corrupted codeword, and the task of inverting one-way functions will correspond to the task of list decoding a corrupted codeword. A characteristic of the error correcting codes which emerge and are addressed by our framework, is that codewords can be approximated by a small number of heavy coefficients in their Fourier representation. Moreover, as long as corrupted words are close enough to legal codewords, they will share a heavy Fourier coefficient. We list decode such codes, by devising a learning algorithm applied to corrupted codewords for learning heavy Fourier coefficients. For codes defined over {0,1}n domain, a learning algorithm by Kushilevitz and Mansour already exists. For codes defined over ZN, which are the codes which emerge for predicates based on number theoretic one-way functions such as the RSA and Exponentiation modulo primes, we develop a new learning algorithm. This latter algorithm may be of independent interest outside the realm of hard-core predicates.

Original languageEnglish
Pages (from-to)146-159
Number of pages14
JournalAnnual Symposium on Foundations of Computer Science - Proceedings
StatePublished - 2003
Externally publishedYes
EventProceedings: 44th Annual IEEE Symposium on Foundations of Computer Science - FOCS 2003 - Cambridge, MA, United States
Duration: 11 Oct 200314 Oct 2003

ASJC Scopus subject areas

  • Hardware and Architecture


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