Low crosstalk address encodings for optical message switching systems

Research output: Contribution to journalArticlepeer-review

Abstract

An optical message switching system delivers messages from N sources to N destinations using beams of light. The redirection of the beams involves vector-matrix multiplication and a threshold operation. The input vectors are set by the sources and may be viewed as the addresses of the desired destinations. In a massively parallel system, it is highly desirable to reduce the number of threshold (non-linear) elements, which require extra wiring and increase clock skew. Moreover, the threshold devices have a sensitivity parameter (implied by the technology) denned as the gap in which the outcome of the device is not determined. This gap is largely effected by the crosstalk which is the maximum number of joint set bits in any pair of addresses, implying a lower bound on the maximum intensity for which the outcome of the threshold operation is determined. In this work we consider the design of addresses which are both short (so that the number of threshold devices is reduced) and have low crosstalk (so that the sensitivity gap may grow). We show that addresses of O(log N) bits exist, for which the crosstalk is a constant fraction of the number of set bits in each address, hence allowing for a Θ(log N) sized sensitivity gap. More generally, we show the precise coefficient which depends on the desired gap. It is established that when using O(log N) bit addresses, the crosstalk cannot be further reduced. An exact construction of O(log2 N) bit addresses is given, where the involved constant depends on the desired crosstalk. Finally we describe briefly the basic optical elements that can be used in order to construct a message switching system which use these address schemes.

Original languageEnglish
Pages (from-to)87-100
Number of pages14
JournalParallel Processing Letters
Volume6
Issue number1
DOIs
StatePublished - 1996

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

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