Intel Alder Lake CPU Architectures

Efraim Rotem; Adi Yoaz; Lihu Rappoport; Stephen J. Robinson; Julius Yuli Mandelblat; Arik Gihon; Eliezer Weissmann; Rajshree Chabukswar; Vadim Basin; Russell Fenger; Monica Gupta; Ahmad Yasin

doi:10.1109/mm.2022.3164338

Intel Alder Lake CPU Architectures

Efraim Rotem, Adi Yoaz, Lihu Rappoport, Stephen J. Robinson, Julius Yuli Mandelblat, Arik Gihon, Eliezer Weissmann, Rajshree Chabukswar, Vadim Basin, Russell Fenger, Monica Gupta, Ahmad Yasin

Research output: Contribution to journal › Article › peer-review

Abstract

Alder Lake cores, system-on-a-chip, and hybrid architecture were designed to meet the challenging requirements for various traditional, emerging, and real-world computational tasks at extensive power performance points. Alder Lake introduces a revolutionary hybrid architecture with a whole new performance core and efficient core. The revolutionary thread director built into Alder Lake hardware and firmware guides the operating system in scheduling the right task to the right core type. Alder Lake hybrid architecture with Intel thread director delivers the highest power-performance dynamic range and computational density.

Original language	English
Pages (from-to)	13-19
Number of pages	7
Journal	IEEE Micro
Volume	42
Issue number	3
DOIs	https://doi.org/10.1109/mm.2022.3164338
State	Published - 2022
Externally published	Yes

Bibliographical note

Publisher Copyright:
© 2022 IEEE.

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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Cite this

@article{311827098e24419f831e4421ea94f15c,

title = "Intel Alder Lake CPU Architectures",

abstract = "Alder Lake cores, system-on-a-chip, and hybrid architecture were designed to meet the challenging requirements for various traditional, emerging, and real-world computational tasks at extensive power performance points. Alder Lake introduces a revolutionary hybrid architecture with a whole new performance core and efficient core. The revolutionary thread director built into Alder Lake hardware and firmware guides the operating system in scheduling the right task to the right core type. Alder Lake hybrid architecture with Intel thread director delivers the highest power-performance dynamic range and computational density.",

author = "Efraim Rotem and Adi Yoaz and Lihu Rappoport and Robinson, {Stephen J.} and Mandelblat, {Julius Yuli} and Arik Gihon and Eliezer Weissmann and Rajshree Chabukswar and Vadim Basin and Russell Fenger and Monica Gupta and Ahmad Yasin",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.",

year = "2022",

doi = "10.1109/mm.2022.3164338",

language = "English",

volume = "42",

pages = "13--19",

journal = "IEEE Micro",

issn = "0272-1732",

publisher = "IEEE Computer Society",

number = "3",

}

TY - JOUR

T1 - Intel Alder Lake CPU Architectures

AU - Rotem, Efraim

AU - Yoaz, Adi

AU - Rappoport, Lihu

AU - Robinson, Stephen J.

AU - Mandelblat, Julius Yuli

AU - Gihon, Arik

AU - Weissmann, Eliezer

AU - Chabukswar, Rajshree

AU - Basin, Vadim

AU - Fenger, Russell

AU - Gupta, Monica

AU - Yasin, Ahmad

PY - 2022

Y1 - 2022

N2 - Alder Lake cores, system-on-a-chip, and hybrid architecture were designed to meet the challenging requirements for various traditional, emerging, and real-world computational tasks at extensive power performance points. Alder Lake introduces a revolutionary hybrid architecture with a whole new performance core and efficient core. The revolutionary thread director built into Alder Lake hardware and firmware guides the operating system in scheduling the right task to the right core type. Alder Lake hybrid architecture with Intel thread director delivers the highest power-performance dynamic range and computational density.

AB - Alder Lake cores, system-on-a-chip, and hybrid architecture were designed to meet the challenging requirements for various traditional, emerging, and real-world computational tasks at extensive power performance points. Alder Lake introduces a revolutionary hybrid architecture with a whole new performance core and efficient core. The revolutionary thread director built into Alder Lake hardware and firmware guides the operating system in scheduling the right task to the right core type. Alder Lake hybrid architecture with Intel thread director delivers the highest power-performance dynamic range and computational density.

UR - http://www.scopus.com/inward/record.url?scp=85127524999&partnerID=8YFLogxK

U2 - 10.1109/mm.2022.3164338

DO - 10.1109/mm.2022.3164338

M3 - Article

AN - SCOPUS:85127524999

SN - 0272-1732

VL - 42

SP - 13

EP - 19

JO - IEEE Micro

JF - IEEE Micro

IS - 3

ER -

Intel Alder Lake CPU Architectures

Abstract

Bibliographical note

ASJC Scopus subject areas

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