Abstract
This paper proposes a hierarchical fault injection emulation framework tailored to the structure of complex and large application-specific circuits, that performs vulnerability analysis of the system for single event upsets (SEUs) at different design granularities in real-time. In particular, the framework allows for efficient probabilistic modelling of the SEU impact, making it particularly applicable for hardware-accelerated approximate applications such as multimedia, computer vision and image/signal processing, due to its high processing speed and real-time capabilities. The framework is emulated on an FPGA-based platform and evaluated using a depth computation kernel, both in standalone manner as well as within a robotic obstacle avoidance application.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 830-833 |
| Number of pages | 4 |
| ISBN (Electronic) | 9783981537062 |
| State | Published - 25 Apr 2016 |
| Externally published | Yes |
| Event | 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 - Dresden, Germany Duration: 14 Mar 2016 → 18 Mar 2016 |
Publication series
| Name | Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 |
|---|
Conference
| Conference | 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016 |
|---|---|
| Country/Territory | Germany |
| City | Dresden |
| Period | 14/03/16 → 18/03/16 |
Bibliographical note
Publisher Copyright:© 2016 EDAA.
ASJC Scopus subject areas
- Hardware and Architecture
- Safety, Risk, Reliability and Quality
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