Abstract
Tree structures have been proposed for special-purpose and general-purpose multiprocessors due to their desirable property of logarithmic path from the root to any leaf element. Since only local communication among processors is needed in tree structures, they are well suited for the VLSI technology. Such an implementation requires an area-economical mapping of a tree on a plane. Novel mapping schemes for trees onto hexagonal arrays (or grids) and appropriate algorithms are proposed here and shown to be superior over known mappings on square arrays (or grids).
Original language | English |
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Pages (from-to) | 104-107 |
Number of pages | 4 |
Journal | IEEE Transactions on Computers |
Volume | C-33 |
Issue number | 1 |
DOIs | |
State | Published - Jan 1984 |
Keywords
- Distributed configuration algorithm
- hexagonal multiprocessor array
- mapping scheme
- tree structures VLSI
ASJC Scopus subject areas
- Software
- Theoretical Computer Science
- Hardware and Architecture
- Computational Theory and Mathematics