Constructions based on the AES round and polynomial multiplication that are efficient on modern processor architectures

The Advanced Encryption Standard (AES) has become the most frequently used block cipher since standardization in 2001. Processor instructions that speed up AES computations and polynomial multiplication in GF (2n) were introduced in 2009 and have become part of almost all 64-bit modern processor architectures. They show latency and throughput improvements across processor generations. In more recent architectures, these instructions also appear in “vectorized” (SIMD) versions that support processing up to 4 independent input streams in parallel. Additional instructions, namely GF-NI, have been added to x86-64 architectures and they can be useful as building blocks for symmetric key cryptography. This paper briefly surveys the functional and performance characteristics of these crypto instructions and their usage for various constructions. It also describes some possible extensions to modes of operations with some desired properties, that the ecosystem can afford with the improved-throughput hardware support available in the modern processor architectures.