Combining static and dynamic array detection for binary synthesis with multiple memory ports

Nadav Rotem, Yosi Ben Asher

Research output: Contribution to journalArticlepeer-review


In High-Level Synthesis, Binary Synthesis is a method for synthesizing compiled applications for which the source code is not available. One of the advantages of FPGAs over processors is the availability of multiple internal and external memory banks. Binary synthesis tools use multiple memory banks if they are able to recover data-structures from the binary. In this work we improve the recovery of data-structures by introducing dynamic memory analysis and combining it with improved static memory analysis. We show that many applications can only be synthesized using dynamic memory analysis. We present two FPGA based architectures for implementing the bound-checking and recovery for the synthesized code. Our experiments show that the proposed technique accelerates the execution of applications which use multiple memory banks concurrently. We demonstrate that many binary applications indeed benefit from this technique.

Original languageEnglish
Pages (from-to)1-18
Number of pages18
JournalDesign Automation for Embedded Systems
Issue number1
StatePublished - Mar 2011


  • High-level synthesis
  • Realtime-systems

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture


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