## Abstract

Many constant time algorithms for various problems have been developed for the reconfigurable mesh (RM) in the past decade. All these algorithms are designed to work with synchronous execution, with no regard for the fact that large size RMs will probably be asynchronous. A similar observation about the PRAM model motivated many researchers to develop algorithms and complexity measures for the asynchronous PRAM (APRAM). In this work, we show how to define the asynchronous reconfigurable mesh (ARM) and how to measure the complexity of asynchronous algorithms executed on it. We show that connecting all processors in a row of an n × n ARM (the analog of barrier synchronization in the APRAM model) can be solved with complexity Θ(n log n). Intuitively, this is average work time for solving such a problem. Next, we describe general a technique for simulating T-step synchronous RM algorithms on the ARM with complexity of Θ(T·n^{2} log n). Finally, we consider the simulation of the classical synchronous algorithm for counting the number of non-zero bits in an n bits vector using (k < n) × n RM. By carefully optimizing the synchronization to the specific synchronous algorithm being simulated, one can (at least in the case of counting) improve upon the general simulation.

Original language | English |
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Pages (from-to) | 441-454 |

Number of pages | 14 |

Journal | VLSI Design |

Volume | 15 |

Issue number | 1 |

DOIs | |

State | Published - Aug 2002 |

## Keywords

- APRAM
- Asynchronous
- Asynchronous reconfigurable algorithm
- Reconfigurable mesh

## ASJC Scopus subject areas

- Hardware and Architecture
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering