Aggressive function inlining: Preventing loop blockings in the instruction cache

Yosi Ben Asher, Omer Boehm, Daniel Citron, Gadi Haber, Moshe Klausner, Roy Levin, Yousef Shajrawi

Research output: Contribution to journalConference articlepeer-review


Aggressive function inlining can lead to significant improvements in execution time. This potential is reduced by extensive instruction cache (Icache) misses caused by subsequent code expansion. It is very difficult to predict which inlinings cause Icache conflicts, as the exact location of code in the executable depends on completing the inlining first. In this work we propose a new method for selective inlining called "Icache Loop Blockings" (ILB). In ILB we only allow inlinings that do not create multiple inlined copies of the same function in hot execution cycles. This prevents any increase in the Icache footprint. This method is significantly more aggressive than previous ones, experiments show it is also better. Results on a server level processor and on an embedded CPU, running SPEC CINT2000, show an improvement of 10% in the execution time of the ILB scheme in comparison to other inlining methods. This was achieved without bloating the size of the hot code executed at any single point of execution, which is crucial for the embedded processor domain. We have also considered the synergy between code reordering and inlining focusing on how inlining can help code reordering. This aspect of inlining has not been studied in previous works.

Original languageEnglish
Pages (from-to)384-397
Number of pages14
JournalLecture Notes in Computer Science
Volume4917 LNCS
StatePublished - 2008
Event3rd International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008 - Goteborg, Sweden
Duration: 27 Jan 200829 Jan 2008

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science (all)


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