A metric-guided method for discovering impactful features and architectural insights for skylake-based processors

Ahmad Yasin; Jawad Haj-Yahya; Yosi Ben-Asher; Avi Mendelson

doi:10.1145/3369383

A metric-guided method for discovering impactful features and architectural insights for skylake-based processors

Ahmad Yasin, Jawad Haj-Yahya, Yosi Ben-Asher, Avi Mendelson

Department of Computer Science

Research output: Contribution to journal › Article › peer-review

Abstract

The slowdown in technology scaling puts architectural features at the forefront of the innovation in modern processors. This article presents a Metric-Guided Method (MGM) that extends Top-Down analysis with carefully selected, dynamically adapted metrics in a structured approach. Using MGM, we conduct two evaluations at the microarchitecture and the Instruction Set Architecture (ISA) levels. Our results show that simple optimizations, such as improved representation of CISC instructions, broadly improve performance, while changes in the Floating-Point execution units had mixed impact. Overall, we report 10 architectural insights—at the microarchitecture, ISA, and compiler fronts—while quantifying their impact on the SPEC CPU benchmarks.

Original language	English
Article number	46
Journal	Transactions on Architecture and Code Optimization
Volume	16
Issue number	4
DOIs	https://doi.org/10.1145/3369383
State	Published - Dec 2019

Bibliographical note

Publisher Copyright:
© 2019 Copyright held by the owner/author(s).

Keywords

Benchmarking
Compiler code generation
Instruction set architecture
Microarchitecture
Performance analysis
Performance comparison

ASJC Scopus subject areas

Software
Information Systems
Hardware and Architecture

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10.1145/3369383

Cite this

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A metric-guided method for discovering impactful features and architectural insights for skylake-based processors

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

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